In RF communication systems, the transmission (TX) and reception (RX) processes involve various stages and components to ensure proper communication. Due to air attenuation, it becomes crucial to enhance the input signal using a RF high-power amplifier before transmission. Recently, the stacked FETs topology started to be used in high-frequency applications connecting transistors in series instead of in parallel, allowing the possibility to reach a proper distribution of the voltage drop across the transistors, very close to the device breakdown voltage. In the thesis, the stacked-FETs Power Amplifier (PA) topology was analyzed using a new approach. The aim is to derive analytical design equations for both the gate capacitance of the pseudo-common gate stages and the Inter-stage Matching Network (InMN) components, allowing the optimum load to be seen at each stage, delivering the maximum possible output power.