In modern System on Chip (SoC) designs, ensuring the reliability and testability of integrated circuits is crucial given their growing complexity. Traditional testing methods are insufficient, requiring advanced Design for Testability (DfT) techniques. The thesis consists in the development of a complex SoC with high reliability and testability without the use of external components. The SoC will allow the final user to run different tests of the platform to ensure the correct behavior of the SoC using an internal processor. The developed system integrates two RISC-V based processors: the Ibex and CVA6 cores. In this SoC, the Ibex processor serves as a test controller for the main CVA6 processor, as well as for memory and other peripheral interfaces, allowing consistent monitoring and testing of key components within the SoC.