![](/style/images/tocco.png)
Loris Panaro
Transaction-Level Ethernet PHY modelling in SystemC.
Rel. Luciano Lavagno. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024
|
PDF (Tesi_di_laurea)
- Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives. Download (6MB) | Preview |
Abstract: |
The availability of Advanced Driver Assistance Systems (ADAS), the pressing demand for connectivity and increasingly complex and content-rich infotainment systems, have had, as first consequence, a considerable increase in data traffic and in the demand for solutions capable of ensuring high throughput and low latency. Among these techno- logical advancements, the adoption of Ethernet as a communication protocol within automotive systems has emerged as a game-changer. Ethernet, a well-established stan- dard in the realm of computer networking, offers numerous advantages in terms of bandwidth, scalability, and flexibility, making it an attractive solution for in-vehicle communication networks. However, being an innovative communication protocol in the automotive industry, it leads to brand new challenges: to define validation methodologies and strategies that allow to easily test the integrability of Engine Control Unit (ECU) interconnected on Ethernet and to perform high specific simulations on a virtual environment among all the involved peripherals of the vehicle. The aim of this master thesis is to deeply analyze how the Ethernet communication protocol can be implemented on an automotive environment according to OPEN Al- liance specifications, to develop virtual Ethernet PHY device TJA1101B provided by NXP Semiconductor using SystemC 2.3.3 library and SCML2 2.8.0 library (provided by Accelera and Synopsys respectively) and to simulate its behaviour in the Synopsys Virtual Development Kit (VDK) tool. The project has been carried out in collaboration with Punch Softronix and Polytechnic of Turin. |
---|---|
Relatori: | Luciano Lavagno |
Anno accademico: | 2023/24 |
Tipo di pubblicazione: | Elettronica |
Numero di pagine: | 103 |
Soggetti: | |
Corso di laurea: | Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering) |
Classe di laurea: | Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA |
Aziende collaboratrici: | DUMAREY Softronix S.r.l. |
URI: | http://webthesis.biblio.polito.it/id/eprint/31812 |
![]() |
Modifica (riservato agli operatori) |