Design of a true random number generator for post-quantum cryptography

The protection of sensitive data is a paramount concern in a wide variety of fields, making the use of cryptography crucial to ensure confidentiality and information security. This is all the more needed after the advent of quantum computers. Their much higher computational strength with respect to the classical ones allows them to break many of the regularly used public-key protocols. Post-quantum cryptography (PQC) researches have been investigating robust algorithms that even quantum computer attacks cannot undermine. The starting point of any cryptographic algorithm is an encryption key generation. A weak random key would allow the attacker to easily decrypt data, exposing the entire cryptosystem to high vulnerability, consequently devaluing the complexity of the PQC algorythm. While pseudo random number generators (PRNGs) are based on deterministic algorithms, hence producing keys that can be predicted once known the algorithm and the initial state, true random number generators (TRNGs) exploit the inherent randomness of physical phenomena (thermal noise, power supply fluctuations, temperature variations etc.) to generate true random samples that fulfill the requirements needed by a robust key. A solid random key should be highly unpredictable (non-deterministic), aperiodic and characterised by good statistical properties. The National Institute of Standards and Technology (NIST) published a set of recommendations and tests to design and validate a reliable Entropy Source (ES) to be used in cryptographic Random Bit Generators (RGBs). This work intends to provide a possible hardware implementation of a ring oscillator-based TRNG, aiming to obtain the best trade-off in terms of area, throughput, power and entropy. The original entropy source is also connected to an accelerator implementing an optimized version of the Keccak security primitive, to have the possibility of generating a random key with or without additional conditioning. The whole system has been integrated as an external accelerator in the RISCV-based X-HEEP microcontroller. The proposed solution passes all the tests of the NIST statistical test suite and shows promising results in terms of entropy, area and throughput, representing an interesting starting point for an integrated RBG for cryptographic algorithms.