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Testing and characterisation of DXPE201 Pin Electronics board

Raffaele Virgilio

Testing and characterisation of DXPE201 Pin Electronics board.

Rel. Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2023

Abstract:

The work concerned about the designing, realisation, characterisation and validation of new functionalities of the DXPE201 board, a pin electronic created in SPEA s.p.a.. This Pin Electronics (PE) is used into an Automatic Test Equipment (ATE) with the asylum of a Device Interface Board (DIB or also called load-board) in order to test the boards' circuitry and the functionalities of the semiconductor Device Under Test (DUT). The rule of DXPE201 is to deliver digital signals, power, or execute precise voltages and currents measurement of DUT's electrical characteristics. The measurement of the board have a certain error declared in the datasheet that must be validate with some good practise technique's. These parameters incides on the performance of the board since it defines the capability of the board to measure the DUTs response and their kind technology. The work was developed in a team of engineers, cooperating with software and firmware engineers to create new functionality, using simulation tool of Altera FPGA, embedded software environment, and laboratory instrumentation. In this work is described the testing process of the board from the first power up to the idea of new functions, the simulation of the design, the characterisation technique of the measurement errors using laboratory instrumentation like HP 3458A Multimeter 8 1/2 Digits, and method used to reduce them.\\Finally a diagnostic test program is developed to auto-validate the boards of the entire ATE and sell it. The result of this thesis is the actual sales of the DXPE201 board by SPEA with the measurement error parameters and test programs described in the work.

Relatori: Maurizio Martina
Anno accademico: 2023/24
Tipo di pubblicazione: Elettronica
Numero di pagine: 112
Informazioni aggiuntive: Tesi secretata. Fulltext non presente
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: Spea SpA
URI: http://webthesis.biblio.polito.it/id/eprint/28568
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