Testing plays a critical role in ensuring electronic devices' reliability, functionality, and overall quality. Embedded memories occupy a considerable portion of the die area, therefore complex and efficient algorithms are essential to ensure reliable operations on Flash memories given their high integration density and specific requirements that make the probability of failure in the memory infrastructure not negligible. This study aims to conduct tests close as much as possible to real-life conditions to thoroughly exercise critical areas of the memory system, highlighting timing-related criticalities. An MBIST module is used to stimulate the memory with minimum CPU usage, ensuring effective and efficient execution of sequential read access. Valuable insights for future developments and improvements are provided.