Subgraph isomorphism acceleration on FPGAs using High-Level Synthesis
Roberto Bosio
Subgraph isomorphism acceleration on FPGAs using High-Level Synthesis.
Rel. Luciano Lavagno, Mihai Teodor Lazarescu. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2022
