Federico Perenno
High-Level Design of 2D-Convolution Accelerators for AI Leveraging Embedded Scalable Platform (ESP).
Rel. Mario Roberto Casu, Luca Urbinati. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022
|
Preview |
PDF (Tesi_di_laurea)
- Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives. Download (5MB) | Preview |
Abstract
Today, Artificial Intelligence (AI) is everywhere and it has made many technological applications more efficient and reliable. Convolutional Neural Networks (CNNs) are at the foundation of the vast majority of AI applications. This type of networks can be extremely accurate, but precision comes at a high computational cost due to the many mutliply-and-accumulate operations between feature and weight tensors that need to be performed. Loosely-coupled hardware accelerators supported by general-purpose processors are an effective way to speed up the computation of CNNs. Thus, the goal of this thesis is to design an accelerator that performs a specific type of convolution known as 2D convolution.
The design process leverages High-Level Synthesis (HLS) and the Embedded Scalable Platform (ESP) tool, which simplifies accelerators design and their integration into heterogeneous System-On-Chip (SoC)
Relatori
Anno Accademico
Tipo di pubblicazione
Numero di pagine
Corso di laurea
Classe di laurea
URI
![]() |
Modifica (riservato agli operatori) |
