Said Sersify
Develop a test bench for an Analog-Digital Converter for a sensor.
Rel. Carlo Ricciardi. Politecnico di Torino, Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict), 2020
Abstract: |
The work done in this internship consisted of updating a test bench designated to the characterization of the ADCs of a chip. The new test bench consisted of a RPi, an FPGA, a 16-bit DAC and the chip in question. The FPGA was programmed to be used as a driver for a 16-bit DAC with sequences of codes commanded by a RPi. The latter needed scripts that will allow it to command simultaneously the chip (in order to allow the ADCs to make the conversion in given sequences and modes) and the FPGA, as well as retrieve the results in form of datasets. These data sets will later be processed in a host computer in order to retrieve key parameters characterizing the chip in question. The communication protocols between the different blocks had to be carefully designed, and the the evaluation environment had to be set in the electronics lab. The retrieved results were reported to the developing team in form of evaluation reports to be used next versions of the chip |
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Relatori: | Carlo Ricciardi |
Anno accademico: | 2020/21 |
Tipo di pubblicazione: | Elettronica |
Numero di pagine: | 61 |
Informazioni aggiuntive: | Tesi secretata. Fulltext non presente |
Soggetti: | |
Corso di laurea: | Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict) |
Classe di laurea: | Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA |
Aziende collaboratrici: | NON SPECIFICATO |
URI: | http://webthesis.biblio.polito.it/id/eprint/16040 |
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