Simulation and Modelling of Interconnect Networks for CMOS Quantum Bit Systems

Because of its disruptive potential and the revolutionary innovations it could bring to the ICTs sector, nowadays Quantum Computing (QC) is being intensively investigated in all its possible and feasible implementations. In particular, silicon-based Quantum Computing solutions are more and more attracting the interest of industrial and scientific communities; thanks to well-established microelectronic technologies for Very Large Scale Integration (VLSI), Si-QC is believed to offer incomparable opportunities to increase the number of computational quantum bits, in order to rapidly achieve hardware systems that could naturally implement complex quantum algorithms. However, in this perspective, due to the exotic characteristics of such a research field, a reliable model of interconnect networks is necessary, in order to evaluate the performances of a quantum system in terms of Qubits control and readout. This master thesis project, carried out at Grenoble CEA-LETI, aims therefore at providing a study of directly On-Chip integrated interconnections for single Qubits spin manipulation and sensing in silicon technologies. In particular, different Radio-Frequencies (RF) networks are discussed and analysed, by means of dedicated simulation softwares, suggesting design opportunities for the efficient control and readout of microwave signals. In the framework of CEA’s efforts to develop architectures for a silicon CMOS-compatible quantum processor, this work is dedicated to the study of RF control and readout structures integrated on the same quantum chip containing the spin Qubits. In this sense, 1-metal layers interconnections are analysed, dealing, first, with the transmission of RF signals, using Coplanar Waveguides (CPW), then focusing on integrated solutions of Electron Spin Resonance (ESR) and Gate Reflectometry techniques, respectively oriented to the control and the readout of spin Qubits.