Because of its disruptive potential and the revolutionary innovations it could bring to the ICTs sector, nowadays Quantum Computing (QC) is being intensively investigated in all its possible and feasible implementations. In particular, silicon-based Quantum Computing solutions are more and more attracting the interest of industrial and scientific communities; thanks to well-established microelectronic technologies for Very Large Scale Integration (VLSI), Si-QC is believed to offer incomparable opportunities to increase the number of computational quantum bits, in order to rapidly achieve hardware systems that could naturally implement complex quantum algorithms. However, in this perspective, due to the exotic characteristics of such a research field, a reliable model of interconnect networks is necessary, in order to evaluate the performances of a quantum system in terms of Qubits control and readout.