Design of a Reconfigurable In-Memory Neural Network Accelerator

Neural networks (NNs) are nowadays widely used for many applications like speech and image recognition. This kind of neural networks has already exceeded human accuracy in many domains at the cost of high complexity from a computational point of view. Usually, CPU and GPU are used to implement such algorithms. GPUs perform better than CPUs thanks to their high number of cores and their wider buses which allow increasing the throughput to the memory. However, while GPUs can reach very high-performances for data-oriented algorithms, their power consumption is very high. For this reason, for low power application, neural network accelerators are designed to obtain high performance with low power consumption. This thesis work can be divided into two parts: in the first one the AlexNet algorithm is implemented on CPU and GPU and performances are compared. In the second part, a reconfigurable In-Memory neural network accelerator is presented. This accelerator allows implementing the most common neural networks layers and it is characterized by very low power consumption. The word “In-Memory” means the capability of executing simple logic operations inside the memory. An architecture based on Logic-in-Memory has several benefits mainly related to the possibility of executing some operations inside the memory itself without wasting energy for transferring data from memory to the computational units.