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Advanced Techniques for Optimization of Board Test

Stefano Massoni

Advanced Techniques for Optimization of Board Test.

Rel. Giovanni Squillero, Matteo Sonza Reorda. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

Abstract:

Advanced Techniques for Optimization of Board Test Because of the increasing complexity of electronic circuits and boards, testing is becoming one of the most important aspects before and after the production cycle, in order to guarantee day by day the quality and reliability of the product. Since a comprehensive and in-depth test could require sometimes an excessive amount of time, is crucial to develop techniques that aim to optimize the process in a smart way. The solution for a printed circuit board test is to use the bed of nails or the flying probes architecture. Two major fields of the latter case, regarding real testing application, have been here deepen and analyzed, and then presented developed algorithms that can solve or optimize some issues that occur in the case of flying probes in-circuit testers. The main goal of these tests is to check if the soldering has been correctly performed in the complicated procedure of manufacturing Printed Circuit Boards (PCBs). For this task, In Circuit Test (ICT) technique is employed, by using probes that contact points on the board, to check the electrical connections by applying voltages and currents. In order to minimize the test time, the sequence of movements of the probes has to be reorganized, considering any obstacle present on the the board and other constraints coming from the environment and the nature of the probes

Relatori: Giovanni Squillero, Matteo Sonza Reorda
Anno accademico: 2019/20
Tipo di pubblicazione: Elettronica
Numero di pagine: 72
Informazioni aggiuntive: Tesi secretata. Full text non presente
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: Spea SpA
URI: http://webthesis.biblio.polito.it/id/eprint/13224
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