Hierarchy Input Constant Input Unused Input Floating Input Output Constant Output Unused Output Floating Output Bidir Constant Bidir Unused Bidir Input only Bidir Output only Bidir
Logic_Analyzer_Sys|SPI_Avalon_Component|Control_Unit 10 0 0 0 15 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Synchronization_Serial_Clock|Synchronization 5 30 0 30 32 30 30 30 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Synchronization_Serial_Clock 5 0 0 0 2 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Counter_Bits 3 0 0 0 2 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Data_Read_Register 36 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Data_Write_Register 5 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Address_Register 5 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath|Command_Register 5 24 0 24 32 24 24 24 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component|Datapath 47 0 0 0 71 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|SPI_Avalon_Component 38 29 0 29 68 29 29 29 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|CU_LOGIC_ANALYZER 16 0 0 0 24 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|WORKING_MODE_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|LOOP_MANAGEMENT 35 0 0 0 3 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|MAX_LOOP_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|TRIGGER_MANAGER 98 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|TRIGGER_CONDITION_MASK_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|TRIGGER_MASK_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|READDATA_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|MUX_READDATA 516 224 0 224 32 224 224 224 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|RAM_MEMORY 44 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|RAM_Glitch 44 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_31|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_31|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_31 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_30|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_30|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_30 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_29|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_29|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_29 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_28|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_28|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_28 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_27|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_27|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_27 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_26|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_26|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_26 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_25|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_25|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_25 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_24|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_24|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_24 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_23|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_23|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_23 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_22|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_22|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_22 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_21|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_21|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_21 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_20|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_20|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_20 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_19|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_19|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_19 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_18|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_18|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_18 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_17|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_17|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_17 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_16|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_16|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_16 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_15|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_15|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_15 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_14|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_14|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_14 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_13|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_13|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_13 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_12|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_12|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_12 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_11|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_11|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_11 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_10|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_10|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_10 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_9|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_9|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_9 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_8|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_8|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_8 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_7|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_7|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_7 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_6|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_6|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_6 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_5|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_5|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_5 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_4|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_4|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_4 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_3|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_3|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_3 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_2|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_2|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_2 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_1|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_1|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_1 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_0|CU_Glitch 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_0|DP_Glitch 2 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR|Glitch_BIT_0 4 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|GLITCH_DETECTOR 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|ADDR_MEMORY_MANAGEMENT 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|MUX_ADDR 65 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|ADDR_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|MUX_CLOCK 3 0 0 0 1 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|CLOCK_SELECTOR_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|CLOCK_GENERATOR 34 0 0 0 3 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER|CLOCK_DIVIDER_REGISTER 35 0 0 0 32 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer|DP_LOGIC_ANALYZER 280 1 0 1 40 1 1 1 0 0 0 0 0
Logic_Analyzer_Sys|Logic_Analyzer 266 0 0 0 34 0 0 0 0 0 0 0 0
Logic_Analyzer_Sys 7 1 0 1 4 1 1 1 0 0 0 0 0