Computational delay & limiters is a subsystem of the autopilot simulation systems APILOT1, APILOT2, and APILOT3. It determines the computational delay within the Flight Control Computer of the aircraft and a 10 Volt limitation of its output signals.
Note that all signals between the control laws and the block Actuator and cable dynamics, including the signals within the subsystem Computational delay & limiters have been expressed in Volts, whereas the outputs of the block Actuator and cable dynamics represent actual changes in elevator-deflection, aileron-deflection, and rudder-deflection, respectively. The latter signals are therefore measured in [rad].