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Advanced C++14 Multithreading Modelling of Electronics Systems

Hesamoddin Fathollahi

Advanced C++14 Multithreading Modelling of Electronics Systems.

Rel. Alessandro Savino, Edgar Ernesto Sanchez Sanchez, Michele Portolan. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2022

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Chips become more complex so it is so important to have design automation in the upper level of abstraction, where the trade-off is more effective and functionality is simpler for recognizing. This process (automating all or a part of the design process and shifting automation to the upper levels) has many advantages when it least to have different styles in design style and it makes faster designing process. Furthermore, we could reach a better output by design automation in comparison to previous methods for designing. Computer-aided tools were developed with success so, in different parts of the development cycle, they are used when in the design of microelectronic circuits, they become useful. These tools, for instance are used in the designing of chemical processes, synthesis of heat exchanger networks, and simulation. As the most important advantage of Synthesis techniques could be mentioned is increasing the speed of the designing cycle, while human attend decreases. The quality of the design cycle could improve by optimization techniques when these days synthesis and optimization techniques are used for almost all digital circuit designs. Register transfer language like VHDL or Verilog in computer science is an IR (Intermediate Representation) which is similar to the assembly language and used for simulating a data flow at the register transfer level of an architecture. However, nowadays, designing an electronic system is made with a Register Transfer Language that is not a fast and easy process to validity in the model for having symmetrical interplay among components in RTL and guarantee in they work correctly, the most important part is having concurrency in control flow and data, between components and their interaction in both High-Level Synthesis (HLS) and Verification. The goal of this thesis is with considering an existing strong HLS framework, Bambu which is made by C++ language, adding The standard C++14 thread library to the library of Bambu framework (libBambu), next performing HLS with this library for having parallel executing blocks by thread library in the Bambu output

Relators: Alessandro Savino, Edgar Ernesto Sanchez Sanchez, Michele Portolan
Academic year: 2022/23
Publication type: Electronic
Number of Pages: 82
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/25440
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