m255
K4
z2
!s11f vlog 2019.1 2019.01, Jan  1 2019
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
Z0 d/auto/gmongelli/pulpino_environment/pulpino/vsim
vadders
Z1 DXx6 sv_std 3 std 0 22 9oUSJO;AeEaW`l:M@^WG92
Z2 DXx4 work 13 fpu_defs_fmac 0 22 D5enJ>6oW7nFVccdQ`cJ_3
DXx4 work 14 adders_sv_unit 0 22 U7X>9h9B9a@QAl1H498dE2
Z3 VDg1SIo80bB@j0V0VzS_@n1
r1
!s85 0
!i10b 1
!s100 A8>cI2mZo7lKmdoK[McKe1
I_:CYKoPzM^05TQ26mXUe50
!s105 adders_sv_unit
S1
R0
Z4 w1639060030
Z5 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/adders.sv
Z6 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/adders.sv
Z7 L0 33
Z8 OL;L;2019.1;69
31
Z9 !s108 1646177306.000000
Z10 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/adders.sv|
Z11 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/adders.sv|
!i113 0
Z12 o-suppress 2583 -quiet -sv -work /auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib -L mtiAvm -L mtiRnm -L mtiOvm -L mtiUvm -L mtiUPF -L infact
Z13 !s92 -suppress 2583 -quiet -sv -work /auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib +incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/. -L mtiAvm -L mtiRnm -L mtiOvm -L mtiUvm -L mtiUPF -L infact
Z14 tCvgOpt 0
Xadders_sv_unit
R1
R2
VU7X>9h9B9a@QAl1H498dE2
r1
!s85 0
!i10b 1
!s100 =7iPgA@?NJooaZji:c;Gn2
IU7X>9h9B9a@QAl1H498dE2
!i103 1
S1
R0
R4
R5
R6
Z15 L0 31
R8
31
R9
R10
R11
!i113 0
R12
R13
R14
valigner
R1
R2
DXx4 work 15 aligner_sv_unit 0 22 >KoMz;fk^GAT?BlMbfDCJ3
R3
r1
!s85 0
!i10b 1
!s100 a5<[OL<U@?V[NUOHd2B7Y2
IC15JCjHjM@TCGcUdO?T[J0
!s105 aligner_sv_unit
S1
R0
R4
Z16 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/aligner.sv
Z17 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/aligner.sv
R7
R8
31
R9
Z18 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/aligner.sv|
Z19 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/aligner.sv|
!i113 0
R12
R13
R14
Xaligner_sv_unit
R1
R2
V>KoMz;fk^GAT?BlMbfDCJ3
r1
!s85 0
!i10b 1
!s100 2^k1j<I15Z=Ia6Qe_h][G2
I>KoMz;fk^GAT?BlMbfDCJ3
!i103 1
S1
R0
R4
R16
R17
R15
R8
31
R9
R18
R19
!i113 0
R12
R13
R14
vbooth_encoder
R1
R2
DXx4 work 21 booth_encoder_sv_unit 0 22 5>PoBIIMl9T<c:;SYH`OS2
R3
r1
!s85 0
!i10b 1
!s100 GAnc40E@X^4e8zL<Jh7n`3
IgTC5<j56JV23D>P7K:FFX1
!s105 booth_encoder_sv_unit
S1
R0
R4
Z20 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_encoder.sv
Z21 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_encoder.sv
Z22 L0 34
R8
31
Z23 !s108 1646177305.000000
Z24 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_encoder.sv|
Z25 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_encoder.sv|
!i113 0
R12
R13
R14
Xbooth_encoder_sv_unit
R1
R2
V5>PoBIIMl9T<c:;SYH`OS2
r1
!s85 0
!i10b 1
!s100 d5PG?a^]5H2W>DDcWaYiz2
I5>PoBIIMl9T<c:;SYH`OS2
!i103 1
S1
R0
R4
R20
R21
Z26 L0 32
R8
31
R23
R24
R25
!i113 0
R12
R13
R14
vbooth_selector
R1
R2
DXx4 work 22 booth_selector_sv_unit 0 22 mNU5A3QeSf8a=mf68Ikb`0
R3
r1
!s85 0
!i10b 1
!s100 Ni<Vk^Oih=k[TNTj`=QK?2
I6jg[MbOZzTM_9Mi7`GF?<0
!s105 booth_selector_sv_unit
S1
R0
R4
Z27 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_selector.sv
Z28 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_selector.sv
R22
R8
31
R23
Z29 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_selector.sv|
Z30 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/booth_selector.sv|
!i113 0
R12
R13
R14
Xbooth_selector_sv_unit
R1
R2
VmNU5A3QeSf8a=mf68Ikb`0
r1
!s85 0
!i10b 1
!s100 9E8dYl[G5`<R`iHf?=Z1a0
ImNU5A3QeSf8a=mf68Ikb`0
!i103 1
S1
R0
R4
R27
R28
R26
R8
31
R23
R29
R30
!i113 0
R12
R13
R14
vcontrol_tp
R1
Z31 DXx4 work 20 fpu_defs_div_sqrt_tp 0 22 SJZG0_Xim2k@8BkzzNELL1
DXx4 work 18 control_tp_sv_unit 0 22 Of^WBOSi_cajJSl>1K3jW1
R3
r1
!s85 0
!i10b 1
!s100 j4ilN:Q:CQS;ce?AmnTfT1
I<ceEA^1eNRD=2f[``SiLi0
!s105 control_tp_sv_unit
S1
R0
R4
Z32 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/control_tp.sv
Z33 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/control_tp.sv
Z34 L0 36
R8
31
Z35 !s108 1646177304.000000
Z36 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/control_tp.sv|
Z37 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/control_tp.sv|
!i113 0
R12
R13
R14
Xcontrol_tp_sv_unit
R1
R31
VOf^WBOSi_cajJSl>1K3jW1
r1
!s85 0
!i10b 1
!s100 mc1Km_WLhFSUKFL<NC>Tz3
IOf^WBOSi_cajJSl>1K3jW1
!i103 1
S1
R0
R4
R32
R33
R22
R8
31
R35
R36
R37
!i113 0
R12
R13
R14
vCSA
R1
R2
DXx4 work 11 CSA_sv_unit 0 22 QF_`f5RH1RB>7k^g7Zh;Q2
R3
r1
!s85 0
!i10b 1
!s100 HzZ0XYa1e4K1>JA=e64mh0
I:WDGonz^i2_4Gk[g5HVN80
!s105 CSA_sv_unit
S1
R0
R4
Z38 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/CSA.sv
Z39 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/CSA.sv
R22
R8
31
R9
Z40 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/CSA.sv|
Z41 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/CSA.sv|
!i113 0
R12
R13
R14
n@c@s@a
XCSA_sv_unit
R1
R2
VQF_`f5RH1RB>7k^g7Zh;Q2
r1
!s85 0
!i10b 1
!s100 7ddA_0SeG8z6gZE]lnj_T1
IQF_`f5RH1RB>7k^g7Zh;Q2
!i103 1
S1
R0
R4
R38
R39
R26
R8
31
R9
R40
R41
!i113 0
R12
R13
R14
n@c@s@a_sv_unit
vdiv_sqrt_top_tp
R1
R31
DXx4 work 23 div_sqrt_top_tp_sv_unit 0 22 `S`7W]GA>If7QBKkDn]G00
R3
r1
!s85 0
!i10b 1
!s100 8IERFMNUOM:7mi2SXR@Z_2
INkObRNO;ljPSW05iV@dAd1
!s105 div_sqrt_top_tp_sv_unit
S1
R0
R4
Z42 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/div_sqrt_top_tp.sv
Z43 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/div_sqrt_top_tp.sv
R22
R8
31
R23
Z44 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/div_sqrt_top_tp.sv|
Z45 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/div_sqrt_top_tp.sv|
!i113 0
R12
R13
R14
Xdiv_sqrt_top_tp_sv_unit
R1
R31
V`S`7W]GA>If7QBKkDn]G00
r1
!s85 0
!i10b 1
!s100 1Y]4gc<JLdnd[e8hIXAdf0
I`S`7W]GA>If7QBKkDn]G00
!i103 1
S1
R0
R4
R42
R43
R26
R8
31
R23
R44
R45
!i113 0
R12
R13
R14
vfmac
R1
R2
DXx4 work 12 fmac_sv_unit 0 22 [S5SAlz6ioMdKB_GU9jo61
R3
r1
!s85 0
!i10b 1
!s100 >YcaSJ4:lHQF>H=4YE<K@3
IQd@N4AK6FYQLCc99;^dCj3
!s105 fmac_sv_unit
S1
R0
R4
Z46 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fmac.sv
Z47 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fmac.sv
Z48 L0 35
R8
31
Z49 !s108 1646177307.000000
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fmac.sv|
Z50 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fmac.sv|
!i113 0
R12
R13
R14
Xfmac_sv_unit
R1
R2
V[S5SAlz6ioMdKB_GU9jo61
r1
!s85 0
!i10b 1
!s100 PhHMKKN<87n6GhM8WYfZ80
I[S5SAlz6ioMdKB_GU9jo61
!i103 1
S1
R0
R4
R46
R47
R7
R8
31
R49
Z51 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fmac.sv|
R50
!i113 0
R12
R13
R14
vfp_fma_wrapper
R1
Z52 !s110 1646177304
!i10b 1
!s100 DET6JJidk7Z2K=n?dfaT91
!s11b dQDY^b@]KO_:XQO=_=oZ31
Id1JReGOE8ClikcoQ^a[f40
R3
S1
R0
R4
8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fp_fma_wrapper.sv
F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fp_fma_wrapper.sv
Z53 L0 42
R8
r1
!s85 0
31
R35
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fp_fma_wrapper.sv|
!s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fp_fma_wrapper.sv|
!i113 0
R12
R13
R14
vfpexc
R1
Z54 DXx4 work 8 fpu_defs 0 22 ?oOPkXFo7KhhI6K[]1k>30
DXx4 work 13 fpexc_sv_unit 0 22 AI6AlE=9@7Zjd^_XFgiP_2
R3
r1
!s85 0
!i10b 1
!s100 TS0_24]70n[:EJdWY7hhZ2
I3@H9h;EU46J@G1P_ZdL=]1
!s105 fpexc_sv_unit
S1
R0
R4
Z55 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpexc.sv
Z56 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpexc.sv
Z57 L0 37
R8
31
Z58 !s108 1646177302.000000
Z59 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpexc.sv|
Z60 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpexc.sv|
!i113 0
R12
R13
R14
Xfpexc_sv_unit
R1
R54
VAI6AlE=9@7Zjd^_XFgiP_2
r1
!s85 0
!i10b 1
!s100 Z2[452_F>AT05WGW<CKlM0
IAI6AlE=9@7Zjd^_XFgiP_2
!i103 1
S1
R0
R4
R55
R56
R48
R8
31
R58
R59
R60
!i113 0
R12
R13
R14
vfpu_add
R1
R54
DXx4 work 15 fpu_add_sv_unit 0 22 BhP]o1AAF1cGWE4l`XhSN0
R3
r1
!s85 0
!i10b 1
!s100 WNEO5<M7?VZJAI<CzS[g;1
I2V@;]AIHi3>^]Sk5zPDDJ1
!s105 fpu_add_sv_unit
S1
R0
R4
Z61 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_add.sv
Z62 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_add.sv
R22
R8
31
R58
Z63 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_add.sv|
Z64 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_add.sv|
!i113 0
R12
R13
R14
Xfpu_add_sv_unit
R1
R54
VBhP]o1AAF1cGWE4l`XhSN0
r1
!s85 0
!i10b 1
!s100 ma1o=7GOQ_OlDH=FR?<;Q1
IBhP]o1AAF1cGWE4l`XhSN0
!i103 1
S1
R0
R4
R61
R62
R26
R8
31
R58
R63
R64
!i113 0
R12
R13
R14
vfpu_core
R1
R54
DXx4 work 16 fpu_core_sv_unit 0 22 h7L<ZPc0k3C@m2:5kO<]J0
R3
r1
!s85 0
!i10b 1
!s100 iX<FXW10naRkQTk17IeJH3
I?MMAOU2SWKLKCQa3jWc:F0
!s105 fpu_core_sv_unit
S1
R0
R4
Z65 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_core.sv
Z66 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_core.sv
R57
R8
31
Z67 !s108 1646177303.000000
Z68 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_core.sv|
Z69 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_core.sv|
!i113 0
R12
R13
R14
Xfpu_core_sv_unit
R1
R54
Vh7L<ZPc0k3C@m2:5kO<]J0
r1
!s85 0
!i10b 1
!s100 :FF@BXbXDh3zSi]_Skl[V3
Ih7L<ZPc0k3C@m2:5kO<]J0
!i103 1
S1
R0
R4
R65
R66
R48
R8
31
R67
R68
R69
!i113 0
R12
R13
R14
Xfpu_defs
R1
Z70 !s110 1646177302
!i10b 1
!s100 l0X0;VHFII;QSVOfEdMIz1
!s11b lNO=mfoH7bHCmC]>nYU=W1
I?oOPkXFo7KhhI6K[]1k>30
V?oOPkXFo7KhhI6K[]1k>30
S1
R0
R4
8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_defs.sv
F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_defs.sv
Z71 L0 20
R8
r1
!s85 0
31
R58
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_defs.sv|
!s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_defs.sv|
!i113 0
R12
R13
R14
Xfpu_defs_div_sqrt_tp
R1
R52
!i10b 1
!s100 bP;QgVofjTXcOe5`_<Rij0
!s11b 5o4i@8jFffXNZQdmnbBK=3
ISJZG0_Xim2k@8BkzzNELL1
VSJZG0_Xim2k@8BkzzNELL1
S1
R0
R4
8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_defs_div_sqrt_tp.sv
F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_defs_div_sqrt_tp.sv
L0 18
R8
r1
!s85 0
31
R35
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_defs_div_sqrt_tp.sv|
!s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_defs_div_sqrt_tp.sv|
!i113 0
R12
R13
R14
Xfpu_defs_fmac
R1
!s110 1646177305
!i10b 1
!s100 ]fOYT6ccPzXA6b;V@d<@C0
!s11b ?jI47]d00bYT34G1W`^[90
ID5enJ>6oW7nFVccdQ`cJ_3
VD5enJ>6oW7nFVccdQ`cJ_3
S1
R0
R4
8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_defs_fmac.sv
F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_defs_fmac.sv
R71
R8
r1
!s85 0
31
R23
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_defs_fmac.sv|
!s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_defs_fmac.sv|
!i113 0
R12
R13
R14
vfpu_ff
R1
R70
!i10b 1
!s100 FeN0nhQBJnM]0^cC_@J6V1
!s11b J>4Rdhh12LWmJE1Z^ao`V0
I?BLg]cB>HoGce3bCPQJhn1
R3
S1
R0
R4
8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_utils/fpu_ff.sv
F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_utils/fpu_ff.sv
R15
R8
r1
!s85 0
31
R58
!s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_utils/fpu_ff.sv|
!s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_utils/fpu_ff.sv|
!i113 0
R12
R13
R14
vfpu_ftoi
R1
R54
DXx4 work 16 fpu_ftoi_sv_unit 0 22 9O>mae3:<zT_i;WGU<X7o3
R3
r1
!s85 0
!i10b 1
!s100 j2M]obbaXBG`zclh=X==:1
IzBTdbQ6ASCdhR1DfGz3N_3
!s105 fpu_ftoi_sv_unit
S1
R0
R4
Z72 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_ftoi.sv
Z73 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_ftoi.sv
R22
R8
31
R67
Z74 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_ftoi.sv|
Z75 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_ftoi.sv|
!i113 0
R12
R13
R14
Xfpu_ftoi_sv_unit
R1
R54
V9O>mae3:<zT_i;WGU<X7o3
r1
!s85 0
!i10b 1
!s100 Q=naDEnj?M6=2ND8Z2=l]2
I9O>mae3:<zT_i;WGU<X7o3
!i103 1
S1
R0
R4
R72
R73
R26
R8
31
R67
R74
R75
!i113 0
R12
R13
R14
vfpu_itof
R1
R54
DXx4 work 16 fpu_itof_sv_unit 0 22 <UFg]BU`PgP67i:ZaReaf3
R3
r1
!s85 0
!i10b 1
!s100 [=<3Jk;6TK@IVS^3GaG:Y3
I<@m6L;`Q7@dY;ITz6id:;1
!s105 fpu_itof_sv_unit
S1
R0
R4
Z76 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_itof.sv
Z77 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_itof.sv
R22
R8
31
R67
Z78 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_itof.sv|
Z79 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_itof.sv|
!i113 0
R12
R13
R14
Xfpu_itof_sv_unit
R1
R54
V<UFg]BU`PgP67i:ZaReaf3
r1
!s85 0
!i10b 1
!s100 PVk7gmYkjeSa<bGnZn0hW3
I<UFg]BU`PgP67i:ZaReaf3
!i103 1
S1
R0
R4
R76
R77
R26
R8
31
R67
R78
R79
!i113 0
R12
R13
R14
vfpu_mult
R1
R54
DXx4 work 16 fpu_mult_sv_unit 0 22 kXYQZoD>R:ESVAhmBLEz;1
R3
r1
!s85 0
!i10b 1
!s100 8`Y_R`R8E4j2iVABhDY3f3
ICPg6InjU]1m?64EhFo>JW1
!s105 fpu_mult_sv_unit
S1
R0
R4
Z80 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_mult.sv
Z81 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_mult.sv
R22
R8
31
R67
Z82 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_mult.sv|
Z83 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_mult.sv|
!i113 0
R12
R13
R14
Xfpu_mult_sv_unit
R1
R54
VkXYQZoD>R:ESVAhmBLEz;1
r1
!s85 0
!i10b 1
!s100 _:UBY2]=jFHfoFL8Y=M4N2
IkXYQZoD>R:ESVAhmBLEz;1
!i103 1
S1
R0
R4
R80
R81
R26
R8
31
R67
R82
R83
!i113 0
R12
R13
R14
vfpu_norm
R1
R54
DXx4 work 16 fpu_norm_sv_unit 0 22 K]FiDbi0@e]_>R<0Z09M60
R3
r1
!s85 0
!i10b 1
!s100 ilzAFF=^ef0PWW^iYPl;;2
I2`=85bALCeSKi7gD_=b]C1
!s105 fpu_norm_sv_unit
S1
R0
R4
Z84 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_norm.sv
Z85 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_norm.sv
R48
R8
31
R67
Z86 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_norm.sv|
Z87 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_norm.sv|
!i113 0
R12
R13
R14
vfpu_norm_div_sqrt
R1
R31
DXx4 work 25 fpu_norm_div_sqrt_sv_unit 0 22 eo_NQdzD9^azIO7a0hT[11
R3
r1
!s85 0
!i10b 1
!s100 o][YV8?NX34BgHVT_79Hm3
ISk>Q2HD3oO<=6?`h]Oe:R2
!s105 fpu_norm_div_sqrt_sv_unit
S1
R0
R4
Z88 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_norm_div_sqrt.sv
Z89 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_norm_div_sqrt.sv
L0 44
R8
31
R35
Z90 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_norm_div_sqrt.sv|
Z91 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/fpu_norm_div_sqrt.sv|
!i113 0
R12
R13
R14
Xfpu_norm_div_sqrt_sv_unit
R1
R31
Veo_NQdzD9^azIO7a0hT[11
r1
!s85 0
!i10b 1
!s100 0WG94e8dI5m2F:^ROUn0S1
Ieo_NQdzD9^azIO7a0hT[11
!i103 1
S1
R0
R4
R88
R89
R53
R8
31
R35
R90
R91
!i113 0
R12
R13
R14
vfpu_norm_fmac
R1
R2
DXx4 work 21 fpu_norm_fmac_sv_unit 0 22 Y=`4SeSPQhiB:3c1R<YOD0
R3
r1
!s85 0
!i10b 1
!s100 315B4hEIcT:ao3;mckW?d1
Ih;g;B:l^_GKS2_V2=m_o22
!s105 fpu_norm_fmac_sv_unit
S1
R0
R4
Z92 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_norm_fmac.sv
Z93 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_norm_fmac.sv
R48
R8
31
R9
Z94 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_norm_fmac.sv|
Z95 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/fpu_norm_fmac.sv|
!i113 0
R12
R13
R14
Xfpu_norm_fmac_sv_unit
R1
R2
VY=`4SeSPQhiB:3c1R<YOD0
r1
!s85 0
!i10b 1
!s100 AjAD``OiGM7U]`[gjac?[1
IY=`4SeSPQhiB:3c1R<YOD0
!i103 1
S1
R0
R4
R92
R93
R7
R8
31
R9
R94
R95
!i113 0
R12
R13
R14
Xfpu_norm_sv_unit
R1
R54
VK]FiDbi0@e]_>R<0Z09M60
r1
!s85 0
!i10b 1
!s100 k^[E6kV8>0;bKCVJD8XMW3
IK]FiDbi0@e]_>R<0Z09M60
!i103 1
S1
R0
R4
R84
R85
R7
R8
31
R67
R86
R87
!i113 0
R12
R13
R14
vfpu_private
R1
R54
DXx4 work 19 fpu_private_sv_unit 0 22 UhLX=7Yhm_9L^Dz^e7_zF2
R3
r1
!s85 0
!i10b 1
!s100 D<[i[e9<3F:]JD:35AAY32
I?LdNn1UdA`goG2S`]>38d3
!s105 fpu_private_sv_unit
S1
R0
R4
Z96 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_private.sv
Z97 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_private.sv
R34
R8
31
R67
Z98 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_private.sv|
Z99 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/fpu_private.sv|
!i113 0
R12
R13
R14
Xfpu_private_sv_unit
R1
R54
VUhLX=7Yhm_9L^Dz^e7_zF2
r1
!s85 0
!i10b 1
!s100 V]VHN2ceQL2HTnEBN5D`31
IUhLX=7Yhm_9L^Dz^e7_zF2
!i103 1
S1
R0
R4
R96
R97
R22
R8
31
R67
R98
R99
!i113 0
R12
R13
R14
viteration_div_sqrt
R1
R31
DXx4 work 26 iteration_div_sqrt_sv_unit 0 22 aFSKPmWIQIjOHbgUZB<PR0
R3
r1
!s85 0
!i10b 1
!s100 F6m_j]WK0KYel7?A:IUfj3
IjmfOM73I7jPYN@;k>cFgg0
!s105 iteration_div_sqrt_sv_unit
S1
R0
R4
Z100 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt.sv
Z101 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt.sv
R26
R8
31
R35
Z102 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt.sv|
Z103 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt.sv|
!i113 0
R12
R13
R14
viteration_div_sqrt_first
R1
R31
DXx4 work 32 iteration_div_sqrt_first_sv_unit 0 22 eWjb^[2>0Q3_M[4HSf_@d3
R3
r1
!s85 0
!i10b 1
!s100 gV>2SVVg7Ue7>_1@4k<W30
IUJC3j9Nn]ChS_<lTlbE0b3
!s105 iteration_div_sqrt_first_sv_unit
S1
R0
R4
Z104 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt_first.sv
Z105 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt_first.sv
R26
R8
31
R35
Z106 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt_first.sv|
Z107 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/iteration_div_sqrt_first.sv|
!i113 0
R12
R13
R14
Xiteration_div_sqrt_first_sv_unit
R1
R31
VeWjb^[2>0Q3_M[4HSf_@d3
r1
!s85 0
!i10b 1
!s100 n]8E92eKkX<dQ5E;OJ94F1
IeWjb^[2>0Q3_M[4HSf_@d3
!i103 1
S1
R0
R4
R104
R105
R15
R8
31
R35
R106
R107
!i113 0
R12
R13
R14
Xiteration_div_sqrt_sv_unit
R1
R31
VaFSKPmWIQIjOHbgUZB<PR0
r1
!s85 0
!i10b 1
!s100 mz14d85KZ5Bz;RnoD_aJm3
IaFSKPmWIQIjOHbgUZB<PR0
!i103 1
S1
R0
R4
R100
R101
R15
R8
31
R35
R102
R103
!i113 0
R12
R13
R14
vLZA
R1
R2
DXx4 work 11 LZA_sv_unit 0 22 ?UO;lQ4E05jM:I1mA`?DL3
R3
r1
!s85 0
!i10b 1
!s100 YSECFc]f3S84f^6^^cMLF0
Ih<1j3IU@A:bEKKID3]g0V2
!s105 LZA_sv_unit
S1
R0
R4
Z108 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/LZA.sv
Z109 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/LZA.sv
R48
R8
31
R9
Z110 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/LZA.sv|
Z111 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/LZA.sv|
!i113 0
R12
R13
R14
n@l@z@a
XLZA_sv_unit
R1
R2
V?UO;lQ4E05jM:I1mA`?DL3
r1
!s85 0
!i10b 1
!s100 <Mi`2KJkf8zD]QkI1ec`j1
I?UO;lQ4E05jM:I1mA`?DL3
!i103 1
S1
R0
R4
R108
R109
R7
R8
31
R9
R110
R111
!i113 0
R12
R13
R14
n@l@z@a_sv_unit
vnrbd_nrsc_tp
R1
R31
DXx4 work 20 nrbd_nrsc_tp_sv_unit 0 22 _fK_Ef:c]7>iRQL:5:<2`2
R3
r1
!s85 0
!i10b 1
!s100 ;O6UQhCL=6oa4jjRoMUSb3
IQJOZ33GS?S[_jk7Pl3V=o3
!s105 nrbd_nrsc_tp_sv_unit
S1
R0
R4
Z112 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/nrbd_nrsc_tp.sv
Z113 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/nrbd_nrsc_tp.sv
R7
R8
31
R23
Z114 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/nrbd_nrsc_tp.sv|
Z115 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/nrbd_nrsc_tp.sv|
!i113 0
R12
R13
R14
Xnrbd_nrsc_tp_sv_unit
R1
R31
V_fK_Ef:c]7>iRQL:5:<2`2
r1
!s85 0
!i10b 1
!s100 gRRScJYcFFXgXR@kEL?X:3
I_fK_Ef:c]7>iRQL:5:<2`2
!i103 1
S1
R0
R4
R112
R113
R15
R8
31
R23
R114
R115
!i113 0
R12
R13
R14
vpp_generation
R1
R2
DXx4 work 21 pp_generation_sv_unit 0 22 M2>>CULk^4jRVI1M^3MBS2
R3
r1
!s85 0
!i10b 1
!s100 [i>4V62Xge3`gPfjkJ<W80
Izn]J;EC[go0PoY8XVNmL_1
!s105 pp_generation_sv_unit
S1
R0
R4
Z116 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/pp_generation.sv
Z117 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/pp_generation.sv
R22
R8
31
R9
Z118 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/pp_generation.sv|
Z119 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/pp_generation.sv|
!i113 0
R12
R13
R14
Xpp_generation_sv_unit
R1
R2
VM2>>CULk^4jRVI1M^3MBS2
r1
!s85 0
!i10b 1
!s100 ?4o=9[>0j2=484eA_fKG>1
IM2>>CULk^4jRVI1M^3MBS2
!i103 1
S1
R0
R4
R116
R117
R26
R8
31
R9
R118
R119
!i113 0
R12
R13
R14
vpreprocess
R1
R31
DXx4 work 18 preprocess_sv_unit 0 22 HhOZj<XIOX:IPV`IE<5E52
R3
r1
!s85 0
!i10b 1
!s100 cS[1@K3iL3FSSGH4?_22H3
IH:a6iGVMUV33IHR7In_Y^3
!s105 preprocess_sv_unit
S1
R0
R4
Z120 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/preprocess.sv
Z121 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/preprocess.sv
R22
R8
31
R23
Z122 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/preprocess.sv|
Z123 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_div_sqrt_tp_nlp/preprocess.sv|
!i113 0
R12
R13
R14
vpreprocess_fmac
R1
R2
DXx4 work 23 preprocess_fmac_sv_unit 0 22 g5>z^WkGB@4Bob^I2E`J[3
R3
r1
!s85 0
!i10b 1
!s100 ;NC6M1X_N>JLOZb5lJ7K`0
I60oDAVJ`cCF_C1oNMNih[2
!s105 preprocess_fmac_sv_unit
S1
R0
R4
Z124 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/preprocess_fmac.sv
Z125 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/preprocess_fmac.sv
R48
R8
31
R23
Z126 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/preprocess_fmac.sv|
Z127 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/preprocess_fmac.sv|
!i113 0
R12
R13
R14
Xpreprocess_fmac_sv_unit
R1
R2
Vg5>z^WkGB@4Bob^I2E`J[3
r1
!s85 0
!i10b 1
!s100 @>Y9X16G0bNXdS@EVV04`3
Ig5>z^WkGB@4Bob^I2E`J[3
!i103 1
S1
R0
R4
R124
R125
R7
R8
31
R23
R126
R127
!i113 0
R12
R13
R14
Xpreprocess_sv_unit
R1
R31
VHhOZj<XIOX:IPV`IE<5E52
r1
!s85 0
!i10b 1
!s100 ?kPc2FWW0hMS1S:Y=9<^j0
IHhOZj<XIOX:IPV`IE<5E52
!i103 1
S1
R0
R4
R120
R121
R26
R8
31
R23
R122
R123
!i113 0
R12
R13
R14
vriscv_fpu
R1
R54
DXx4 work 17 riscv_fpu_sv_unit 0 22 ?3]<kI53CoL[2bODM5ljo2
R3
r1
!s85 0
!i10b 1
!s100 [8Z?2:>=6zF9TQT42nC_02
IgZ:c2AZX5hj?`9BZ=L>a42
!s105 riscv_fpu_sv_unit
S1
R0
R4
Z128 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/riscv_fpu.sv
Z129 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/riscv_fpu.sv
R48
R8
31
R35
Z130 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/riscv_fpu.sv|
Z131 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_v0.1/riscv_fpu.sv|
!i113 0
R12
R13
R14
Xriscv_fpu_sv_unit
R1
R54
V?3]<kI53CoL[2bODM5ljo2
r1
!s85 0
!i10b 1
!s100 [_FRfj[d2?IV=ZNMGODZP0
I?3]<kI53CoL[2bODM5ljo2
!i103 1
S1
R0
R4
R128
R129
R7
R8
31
R35
R130
R131
!i113 0
R12
R13
R14
vwallace
R1
R2
DXx4 work 15 wallace_sv_unit 0 22 Ll0Z3:[>>Yd<B;hA6CB_g3
R3
r1
!s85 0
!i10b 1
!s100 n?Peb80jTeNdg@]oS>`>H1
IRbe^McZ^5YV<VU=G5:S]J0
!s105 wallace_sv_unit
S1
R0
R4
Z132 8/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/wallace.sv
Z133 F/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/wallace.sv
R22
R8
31
R9
Z134 !s107 /auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/wallace.sv|
Z135 !s90 -quiet|-sv|-suppress|2583|-work|/auto/gmongelli/pulpino_environment/pulpino/vsim/modelsim_libs/fpu_lib|+incdir+/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/.|/auto/gmongelli/pulpino_environment/pulpino/vsim/..//ips/fpu/hdl/fpu_fmac/wallace.sv|
!i113 0
R12
R13
R14
Xwallace_sv_unit
R1
R2
VLl0Z3:[>>Yd<B;hA6CB_g3
r1
!s85 0
!i10b 1
!s100 2M]>Wf^[WiTa12g4j0O^[0
ILl0Z3:[>>Yd<B;hA6CB_g3
!i103 1
S1
R0
R4
R132
R133
R26
R8
31
R9
R134
R135
!i113 0
R12
R13
R14
