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Software-Based Radiation Effects Analysis on AP-SoC Embedded Processor

Daniele Rizzieri

Software-Based Radiation Effects Analysis on AP-SoC Embedded Processor.

Rel. Luca Sterpone, Sarah Azimi. Politecnico di Torino, Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica), 2021

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Fault tolerance analysis is a crucial and fundamental phase in any development process that has the aim to produce a dependable system and throughout the decades, each field of science improved its knowledge about all the possible threats that can affect a system during operation: space exploration field is one of the most active and focused on these studies. This research has been developed as part of the mission HERA by ESA, due to launch in 2024, and has the main goal of investigating what are the outcomes that can occur when SEU and SEMU faults affect several parts of a well-known system under test. For this purpose, in this thesis a well-known System-On-Chip architecture has been considered to analyse the effects of radiations striking the hardware during the execution of an application. Furthermore, through the use of two ex novo fault injection platforms, observations on the criticality level of the various parts of the SoC have been deduced, along with other key observations coming from the obtained data. The first developed tool-set addresses fault injections in the main memory of the computation system (Random Access Memory, RAM), while the second one aims at the injection of faults in the registers of the CPU. In both cases the goal is to simulate radiation related faults at runtime, during the execution of an application. To perform a complete analysis, several detailed fault models have been chosen, each related to specific scenarios. To perform the radiation effects analysis a subset of the MiBench benchmark program suite has been chosen as test input. It has been decided to classify each injection outcome by means of process exit status or crash data (core dump) and by the obtained application results. One of the main results is the observation of the segmentation fault as the most common malfunction, throughout all the fault models and among all the benchmark applications. In particular, it has been observed that if the main memory control logic gets affected and the process fails, the probability that a segmentation fault occurred are hugely bigger than the ones related to other malfunctions (i.e. Floating-Point Unit exception, Illegal Instruction and others). Another key point is represented by the Silent Data Error (SDE) analysis. In fact, it has been observed that we have a considerably higher probability to have an SDE when an alteration of the values in the registers occurs. On the contrary, the probability to obtain a hang process is much higher when the main memory portion related to it gets corrupted, while it is nearly null when registers get altered during execution.

Relators: Luca Sterpone, Sarah Azimi
Academic year: 2020/21
Publication type: Electronic
Number of Pages: 76
Corso di laurea: Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica)
Classe di laurea: New organization > Master science > LM-25 - AUTOMATION ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/19116
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