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Calibration of FPGA Boards: Implementation of a 5-point Linear Interpolation feature on Analogue I/O and Discrete I/O VME FPGA Boards

Alessio Melibeo

Calibration of FPGA Boards: Implementation of a 5-point Linear Interpolation feature on Analogue I/O and Discrete I/O VME FPGA Boards.

Rel. Danilo Demarchi, Antonio Grasso. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019


This thesis is the result of the work carried out throughout the 6-month Internship in the \textbf{Leonardo S.p.A - Aircraft} division in Turin. During this experience I had the possibility to cooperate with the engineering team in charge of the development of the Aerospace Ground Equipments (\textbf{AGE}), i.e. complex electronic systems capable of performing end-to-end test routines on avionic systems such as pylons or missile-launchers. In particular, the AGE chosen by the company as main subject of the Internship work was the Enhanced ACS Test Set (\textbf{EATS}) for the Eurofighter Typhoon (EFA) Armament Control Subsystem (ACS). This product designed by Leonardo S.p.A has its brain in a set of boards equipped with a \textbf{Xilinx Spartan-6 FPGA}, which communicate among each other through the VME protocol. This equipment is used to test the Weapon System of the EFA in order to assess its correct working state. However, the precision of the outcomes of the testing procedures can be heavily affected by many disturbing factors such as the length of the cables, the environmental conditions, the non-linearity of the equipment, etc. The final goal of the work was to develop an update to the current version of the Firmware of the boards, adding a new \textbf{Calibration} feature capable of reducing the above-mentioned effects in order to obtain more reliable information on the correct working state of the Unit Under Test (UUT). In particular, the calibration was implemented through a 5-point Linear Interpolation routine, which resulted to be a satisfying trade-off between precision, computational effort and ease of use for the final customer. A first glance on the AGE Group in Leonardo will be given, with particular focus on the EATS, followed by an overview of the current measuring capabilities of the boards. The central part of this document will consist of the detailed description of the new features added in the upgraded version of the Firmware. Finally, the old and new versions will be compared in order to evaluate the improvements achieved.

Relators: Danilo Demarchi, Antonio Grasso
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 135
Additional Information: Tesi secretata. Fulltext non presente
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: LEONARDO SPA
URI: http://webthesis.biblio.polito.it/id/eprint/13225
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