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HW/SW Co-design Tool Oriented to Early System Prototyping

Carlos Jose Pena Agreda

HW/SW Co-design Tool Oriented to Early System Prototyping.

Rel. Edgar Ernesto Sanchez Sanchez. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019


Whereas some companies purchase IP that comes with HW/SW Co-design Tool oriented for developing, verification and testing of embedded software, many others have the need to develop their own IP. This can be expensive and inefficient and also represents a challenge as the workflow must be fast in order to be competitive in the fast-paced technology industries. Therefore, the aim of this thesis is to create a HW/SW Co-design Tool that allows to develop, test and debug embedded software in a user friendly and efficient way. This is attained by using different modelling levels such as cycle accurate and transaction accurate on the same system. This is accomplished by fusing very well known modelling tools like QEMU for attaining a fast and flexible model of the processor and Verilator for the precise cycle accurate in the critical testing sections like peripherals. Using the tool has a big impact in the efficiency of the workflow between department as for example it will allow development of drivers before IC tape-out.

Relators: Edgar Ernesto Sanchez Sanchez
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 70
Additional Information: Tesi secretata. Fulltext non presente
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: Oticon A/S
URI: http://webthesis.biblio.polito.it/id/eprint/12545
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