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Implementation and Evaluation of On-Chip Algorithms for Reliability Optimization of Embedded Flash Memories

Pietro Inglese

Implementation and Evaluation of On-Chip Algorithms for Reliability Optimization of Embedded Flash Memories.

Rel. Paolo Bernardi, Riccardo Cantoro. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

Abstract:

Embedded Flash Wafer Sort Yield Modeling Simulating Alternative Redundancy and Feasibility Study for On-Site Suspect-identification/execution of Machine Learning
Relators: Paolo Bernardi, Riccardo Cantoro
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 85
Additional Information: Tesi secretata. Fulltext non presente
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: Infineon Technologies AG
URI: http://webthesis.biblio.polito.it/id/eprint/12537
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