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Thermal modeling of surface mount diodes and thermal resistance evaluation

Monica Beccaria

Thermal modeling of surface mount diodes and thermal resistance evaluation.

Rel. Sergio Ferrero, Luciano Scaltrito. Politecnico di Torino, Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict), 2019


Thermal characterization of semiconductor devices is an ever increasing challenge for device producers. Heat flow modeling and ways to estimate thermal behaviour, especially in term of junction temperature for semiconductor devices, are key factors. The thermal resistance junction to case is one of the most important characteristics. However, the evaluation of this parameter is not trivial at all: the accuracy and the repeatability of its measurements are key issues. Moreover, the three-dimensional heat spreading, typical of a considerable slice of devices, in addition to the description of thermal properties by the mean of a unique element with the limit of the definition itself, make the determination of this parameter influenced by the operating conditions and by the measurement set-up. For this reason, it was deemed interesting to run a more in-depth study about thermal behavior of such devices. The thermal model of a surface mount rectifier diode was built, employing COMSOL Multiphysics 5.1 as simulation software. Indeed, the finite element method is very efficient to solve the set of differential equations and recover temperature distribution. The device and its thermal behaviour was reproduced, after analyses on the geometrical structure, material properties, boundary conditions and meshing issues had been conducted, up to its embedding in different measurement configurations. The thermal resistance was evaluated in steady-state condition, according to the Joint Electron Device Engineering Council (JEDEC) standard JESD51-1, and in some case by transient analysis, exploiting the "dual interface procedure", recommended by the JEDEC standard JESD51-14. For the latter, two different interface materials between the case and the heat-sink are required and structure curves, reproducing the layers crossed by the heat flow path in thermal resistance and capacitance graph, were traced by the mean of the TDIM Master software. The different systems were compared in term of maximal junction temperature and transitory interval. Thermal resistance at the two device leads was evaluated and the influence of the measurements arrangement was highlighted. Focus was put on the multidimensionality of the heat flow, while an actual resistance, as a physical opposition to the heat, only determined by the material and the geometry, was individuated. A good agreement between simulation and experimental data was shown, finding an explanation for the diversity of reached results, changing with the set-up. Even the limits of the dual procedure, when the heat path is not essentially uni-dimensional, were recovered. The validity of the model was also confirmed by a series of simulation on a different typology of diode. This thesis was developed in collaboration with Vishay Semiconductor Italiana S.p.A.

Relators: Sergio Ferrero, Luciano Scaltrito
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 75
Additional Information: Tesi secretata. Fulltext non presente
Corso di laurea: Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: Vishay Semiconductor Italiana SpA
URI: http://webthesis.biblio.polito.it/id/eprint/12518
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