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List of theses with "Cerini, Samuele Yves as relator"

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Jump to: 21 April 2023
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21 April 2023

[img] Antonio De Luca. Leveraging Deep Learning Techniques for Cross-Family Side-Channel Attacks on 8-bit Microcontrollers. Rel. Paolo Ernesto Prinetto, Samuele Yves Cerini. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

This list was generated on Fri May 17 00:26:28 2024 CEST.