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Enhancing the digital performance of an analog Automatic Test Equipment: the case of Accotest STS8300

Alessio Salta

Enhancing the digital performance of an analog Automatic Test Equipment: the case of Accotest STS8300.

Rel. Matteo Sonza Reorda, Paolo Bernardi. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

Abstract:

The significant advancements in the microelectronics world in recent years have introduced unprecedented opportunities for the optimization of integrated circuits (ICs), allowing improvements in terms of performance, consumed power, and area; over time, this has also included an increasing complexity in any design, complicating test and verification processes that aim at demonstrating the correctness of the design. An ample range of functional and non-functional tests are nowadays performed by dedicated machines, known as automatic test equipments (ATEs), that are typically costly and, depending on the model, deeply oriented towards specific categories of ICs (e.g., purely analog or digital products); the advantages associated with the high degree of expertise in one field are also correlated, on the other hand, with the limitations that come when testing designs of different natures. The main goal of this thesis is to create a framework for enhancing the digital capabilities of a particular type of mixed-signal automatic test equipment (known as STS8300, by Accotest) that is primarily focused on purely analog products. The objective is to employ a highly-performant STM32 proprietary microcontroller (named STM32H723ZG), integrated into a development board that mounts a series of analog and digital peripherals in order to create an additional functional module in charge of testing digital ICs. As a case study, a 768-bit Electrically Erasable and Programmable Non-Volatile Memory (NVM), with an important digital block, has been selected as the design under test. Following a preliminary phase devoted to the study of the targeted architecture, a dedicated printed circuit board has been developed specifically for the purpose of assembling the board along with all the required parts to integrate them within the final testing environment. In detail, the microcontroller communicates with the ATE, initiating functional test routines in response to specific instructions provided by the testing machine and returning the elaborated results via Serial Peripheral Interface (SPI) or Inter-Integrated Circuit (I2C) communication protocols at the end of the procedure. To carry out the aforementioned functions, a custom firmware (entirely written in C) has been developed, taking advantage of STMicroelectronics' dedicated development environment for proprietary microcontrollers. Preliminary results, showing the feasibility of the proposed approach, have been acquired with the help of STMicroelectronics' Analog, MEMS & Sensors testing group, which also provided all the necessary equipment for the development of this work.

Relators: Matteo Sonza Reorda, Paolo Bernardi
Academic year: 2023/24
Publication type: Electronic
Number of Pages: 98
Additional Information: Tesi secretata. Fulltext non presente
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: STMicroelectronics SRL
URI: http://webthesis.biblio.polito.it/id/eprint/29422
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