1 | /* |
2 | * integ_Accel_and_Gyro_dt.h |
3 | * |
4 | * Academic License - for use in teaching, academic research, and meeting |
5 | * course requirements at degree granting institutions only. Not for |
6 | * government, commercial, or other organizational use. |
7 | * |
8 | * Code generation for model "integ_Accel_and_Gyro". |
9 | * |
10 | * Model version : 1.8 |
11 | * Simulink Coder version : 8.12 (R2017a) 16-Feb-2017 |
12 | * C source code generated on : Wed Dec 06 13:43:27 2017 |
13 | * |
14 | * Target selection: ert.tlc |
15 | * Embedded hardware selection: ARM Compatible->ARM Cortex |
16 | * Code generation objectives: Unspecified |
17 | * Validation result: Not run |
18 | */ |
19 | |
20 | #include "ext_types.h" |
21 | |
22 | /* data type size table */ |
23 | static uint_T rtDataTypeSizes[] = { |
24 | sizeof(real_T), |
25 | sizeof(real32_T), |
26 | sizeof(int8_T), |
27 | sizeof(uint8_T), |
28 | sizeof(int16_T), |
29 | sizeof(uint16_T), |
30 | sizeof(int32_T), |
31 | sizeof(uint32_T), |
32 | sizeof(boolean_T), |
33 | sizeof(fcn_call_T), |
34 | sizeof(int_T), |
35 | sizeof(pointer_T), |
36 | sizeof(action_T), |
37 | 2*sizeof(uint32_T), |
38 | sizeof(int16_T), |
39 | sizeof(int16_T), |
40 | sizeof(int16_T), |
41 | sizeof(freedomk64f_fxos8700_integ_Ac_T), |
42 | sizeof(freedomk64f_I2CMasterRead_int_T), |
43 | sizeof(freedomk64f_I2CMasterWrite_in_T) |
44 | }; |
45 | |
46 | /* data type name table */ |
47 | static const char_T * rtDataTypeNames[] = { |
48 | "real_T", |
49 | "real32_T", |
50 | "int8_T", |
51 | "uint8_T", |
52 | "int16_T", |
53 | "uint16_T", |
54 | "int32_T", |
55 | "uint32_T", |
56 | "boolean_T", |
57 | "fcn_call_T", |
58 | "int_T", |
59 | "pointer_T", |
60 | "action_T", |
61 | "timer_uint32_pair_T", |
62 | "int16_T", |
63 | "int16_T", |
64 | "int16_T", |
65 | "freedomk64f_fxos8700_integ_Ac_T", |
66 | "freedomk64f_I2CMasterRead_int_T", |
67 | "freedomk64f_I2CMasterWrite_in_T" |
68 | }; |
69 | |
70 | /* data type transitions for block I/O structure */ |
71 | static DataTypeTransition rtBTransitions[] = { |
72 | { (char_T *)(&integ_Accel_and_Gyro_B.FXOS87006AxesSensor[0]), 0, 0, 3 }, |
73 | |
74 | { (char_T *)(&integ_Accel_and_Gyro_B.Gain[0]), 1, 0, 9 }, |
75 | |
76 | { (char_T *)(&integ_Accel_and_Gyro_B.acc[0]), 4, 0, 14 }, |
77 | |
78 | { (char_T *)(&integ_Accel_and_Gyro_B.dataw), 5, 0, 1 } |
79 | , |
80 | |
81 | { (char_T *)(&integ_Accel_and_Gyro_DW.obj), 17, 0, 1 }, |
82 | |
83 | { (char_T *)(&integ_Accel_and_Gyro_DW.obj_d), 18, 0, 1 }, |
84 | |
85 | { (char_T *)(&integ_Accel_and_Gyro_DW.Scope_PWORK.LoggedData[0]), 11, 0, 13 }, |
86 | |
87 | { (char_T *)(&integ_Accel_and_Gyro_DW.DiscreteTimeIntegrator_DSTATE), 1, 0, 2 |
88 | }, |
89 | |
90 | { (char_T *)(&integ_Accel_and_Gyro_DW.i2cRd_SubsysRanBC), 2, 0, 1 }, |
91 | |
92 | { (char_T *)(&integ_Accel_and_Gyro_DW.is_active_c3_integ_Accel_and_Gy), 3, 0, |
93 | 3 }, |
94 | |
95 | { (char_T *)(&integ_Accel_and_Gyro_DW.i2cWr.obj), 19, 0, 1 }, |
96 | |
97 | { (char_T *)(&integ_Accel_and_Gyro_DW.i2cWr.I2CMasterWrite_PWORK), 11, 0, 1 }, |
98 | |
99 | { (char_T *)(&integ_Accel_and_Gyro_DW.i2cWr.i2cWr_SubsysRanBC), 2, 0, 1 } |
100 | }; |
101 | |
102 | /* data type transition table for block I/O structure */ |
103 | static DataTypeTransitionTable rtBTransTable = { |
104 | 13U, |
105 | rtBTransitions |
106 | }; |
107 | |
108 | /* data type transitions for Parameters structure */ |
109 | static DataTypeTransition rtPTransitions[] = { |
110 | { (char_T *)(&integ_Accel_and_Gyro_P.FXOS87006AxesSensor_SampleTime), 0, 0, 2 |
111 | }, |
112 | |
113 | { (char_T *)(&integ_Accel_and_Gyro_P.Constant_Value), 1, 0, 5 }, |
114 | |
115 | { (char_T *)(&integ_Accel_and_Gyro_P.datar_Y0), 4, 0, 4 } |
116 | }; |
117 | |
118 | /* data type transition table for Parameters structure */ |
119 | static DataTypeTransitionTable rtPTransTable = { |
120 | 3U, |
121 | rtPTransitions |
122 | }; |
123 | |
124 | /* [EOF] integ_Accel_and_Gyro_dt.h */ |
125 | |