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Design and Standardization of a MolFCN Based Cell

Eleonora Girardi

Design and Standardization of a MolFCN Based Cell.

Rel. Gianluca Piccinini, Yuri Ardesi, Federico Ravera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025

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Abstract:

Nowadays making tiny device and simulating to reach upgrades it has pushed Molecular Field-Coupled Nanocomputing - called MolFCN - into focus; here bits aren't stored with usual currents like in CMOS but through molecular charge alignment, flipped by close-range electric pushes. In MolFCN, nearby units interact via electric push-pull forces; timed background fields gently tilt energy levels to set, move, or hold those alignments. Because charges don’t have to travel far through wires, energy waste drops sharply, wiring gets easier, plus devices can shrink way further. Instead of typical logic gates, decisions come from group influence and flipping actions; data moves along multi-step pathways that guide polarization shifts while resisting glitches from heat or tiny flaws. In this setup, compounds able to switch between two stable charge states work well at normal temps. Of these, bisferrocene stands out - thanks to its ability to shift between mixed-valence forms and maintain tight internal links, which builds a reliable electric dipole tied straight to MolFCN polarization. The study uses these traits to build a basic unit - a tiny structure controlled by electrodes that sets, holds, and detects molecular polarization - shaped and made with materials picked to boost coupling, cut unwanted effects, and keep enough energy separation when exposed to real-world electric fields. In this case study has been set up a MATLAB-driven Graphical User Interface that builds complete 3D device shapes, then spits out input files for Synopsys Sentaurus where SDE handles structure and mesh, SDevice deals with electrical and thermal behavior, while SVisual takes care of results visualization. From a base cell layout - one with a Cut-Y version to test spacing and wiring limits -it has been expanded the system into practical building blocks: a three-phase bus adapted for N-phase use, along with a standard majority logic gate. Simulation outcomes match MolFCN predictions for the chosen test setup, showing proper field coupling along with timed signal movement. We looked at electric fields, current density patterns, how layer structure affects performance, also heat behavior - highlighting usable operation ranges plus dependence on shape. Taken together, this work delivers: (i) a flexible, automation-friendly process linking CAD models to TCAD simulations for building MolFCN devices; (ii) real-world evaluation of a bis-ferrocene-based logic cell, including its Cut-Y version, the N-Phase bus and the Majority Voter gate; besides scalable upgrades for N-phase wiring and majority voting circuits - offering solid groundwork for lab testing and structured research into nanoscale data transfer.

Relatori: Gianluca Piccinini, Yuri Ardesi, Federico Ravera
Anno accademico: 2025/26
Tipo di pubblicazione: Elettronica
Numero di pagine: 146
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: NON SPECIFICATO
URI: http://webthesis.biblio.polito.it/id/eprint/38740
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