Federico Carbone
Battery Monitor IC Simulation for Hardware-In-the-Loop Application - Development of a Programmable Fault Injection Platform for Battery Management Systems.
Rel. Massimo Violante. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2025
| Abstract: |
Battery Management Systems (BMSs) are safety-critical components in electric vehicles, demanding thorough testing under realistic and fault-prone conditions. This thesis presents the design and implementation of a high-performance battery monitor Integrated Circuit (IC) simulator for Hardware-In-the-Loop (HIL) applications. Designed for the NXP S32K344-based RD-K344BMU development board, the simulator emulates the MC33772 and MC33774 devices by accurately replicating their TPL2 and TPL3 communication protocols and internal register architectures. A key focus is placed on fault injection, a crucial requirement in validating BMS robustness in compliance with ISO 26262 standards. The simulator features dynamic runtime fault injection mechanisms, enabling the host system to introduce Cyclic Redundancy Check (CRC) errors, timing anomalies, register overrides, and communication faults. This architecture supports up to 62 virtual slave devices, each modeled with isolated state and an internal Finite State Machine (FSM), while ensuring real-time performance comparable to physical hardware. The simulator is actively used in Formula E BMS testing, where it helped uncover inefficiencies in communication chain handling and enabled substantial improvements in sampling rates and safety features. A layered, modular design, backed by static memory allocation, DMA-accelerated SPI communication, and an abstracted register generation pipeline, ensures ease of extension, maintainability, and performance. This work not only validates the feasibility of realistic BMS simulation but also sets the foundation for scalable, fault-injectable HIL test environments applicable across automotive and industrial domains. |
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| Relatori: | Massimo Violante |
| Anno accademico: | 2025/26 |
| Tipo di pubblicazione: | Elettronica |
| Numero di pagine: | 74 |
| Informazioni aggiuntive: | Tesi secretata. Fulltext non presente |
| Soggetti: | |
| Corso di laurea: | Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering) |
| Classe di laurea: | Nuovo ordinamento > Laurea magistrale > LM-32 - INGEGNERIA INFORMATICA |
| Aziende collaboratrici: | Podium Engineering Srl |
| URI: | http://webthesis.biblio.polito.it/id/eprint/37636 |
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