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GaAs MMIC technology evaluation and Doherty power amplifier design

Fabio Spagnolo

GaAs MMIC technology evaluation and Doherty power amplifier design.

Rel. Vittorio Camarchia, Anna Piacibello. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025

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Abstract:

Power amplifiers are one of the fundamental blocks of the transceiver chain and are usually the last element before the antenna, therefore they have strong impact on the overall performance of the communication system. Nowadays, wireless communication systems often employ complex modulation schemes. This kind of modulation often involves high PAPR signals, meaning that the working power levels of the power amplifiers are not constant and are often far from saturation, where the amplifier has the best efficiency. Therefore it is essential to explore amplifier topologies that maintain high efficiency and linearity even in back-off. Doherty power amplifiers address this challenge by combining two devices (main and auxiliary) through a load modulation network. This work presents a comparison of two GaAs technologies for broadband Doherty amplifier design: WIN PQG3 and UMS PPH15X-20, targeting the 8-12 GHz frequency band. An evaluation of the key device characteristics including gain, efficiency, and output power was conducted to identify optimal peripheries from each technology. For circuit blocks such as the combiner, the splitter and the matching networks, specific topologies were analyzed to address the challenges related to the 4 GHz bandwidth. Ideal circuit simulations demonstrated that both technologies could cover the 4 GHz range while achieving 30 dBm output power and efficiency higher than 40%. However, the transition to a real implementation was the most critical step since all the losses of the real components were not considered in the initial simulations. Another major challenge was the limited space available on the chip that led to changes in the topology and dimensions of some parts of the circuit. These changes significantly affected the overall perfomance of the amplifier and also on the bandwidth coverage. The final performance obtained are: an output power of 29 dBm and a minimum efficiency of 20% which is significantly lower compared to the ideal case(40%). Additionally, the gain is relatively low (around 4–5 dB), indicating that a driver stage should be added in the future to improve the gain.

Relatori: Vittorio Camarchia, Anna Piacibello
Anno accademico: 2024/25
Tipo di pubblicazione: Elettronica
Numero di pagine: 63
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: Politecnico di Torino
URI: http://webthesis.biblio.polito.it/id/eprint/36523
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