Analysis and design of a multi-level mono phase 4 kW AC-DC converter with Power Factor Correction using GaN Transistors.

This thesis details the schematic-level design and functional analysis of a 4-kW mono-phase AC-DC converter developed using the Flying Capacitor Multilevel (FCML) topology and enhancement-mode Gallium Nitride (GaN) transistors. Initially, the converter was developed to address all relevant high-performance applications in grid-connected power supplies such as power factor correction (PFC) systems and electric vehicle infrastructure, as well as for renewable energy conversion applications. The complete implementation of GaN-based switching devices allows for high-frequency operation, low switching loss, and improved power density compared to silicon-based devices. The structure of the converter was based on a multilevel topology, which was able to create intermediate voltage levels using two flying capacitor stages. The multilevel structure allowed for high performance by reducing the voltage stress on switches, lowering output harmonic content, and improving EMI performance. In full topology, various modules included EMI filtering, low-frequency synchronous rectification with highly efficient MOSFETs, a boost stage with player gate drives, and the high-frequency multilevel switching network with GaN FETs. Energy storage utilized both asymmetrically sized flying capacitors and a bank of electrolytic DC-link capacitors to meet the constraining transient response and voltage ripple performance. Gate driver circuits are developed to meet the electrical charactercs of each switching device. The low-frequency MOSFETs are driven usi,ng a half-bridge IRS2183 driver, while the high-speed GaN switches are drivthat en using isolated gate drivers with logic-level inputs together with dedicated bootstrap and power supplies. Analog voltage sensing circuits are used to measure the AC input waveform and voltages across the flying capacitor banks for the zero-crossing detection and capacitor voltage balancing necessary to maintain multilevel stability. The circuit should specify each component based on its electrical performance, reliability, and thermal considerations, where available manufacturers offer datasheet specs and design performance verification on simulations. Compartmentalizing the separate elements of the circuit in the schematic follows a fundamental energy flow to provide connectivity with modular aspects for analysis in future debugging plans. The simulations performed in LTSpice, MATLAB, and PLECS verified each subcircuit was operated as intended and confirmed that the overall topology met expectations under steady-state conditions. The results indicate the designed converter was able to meet the expected performance targets of output regulation, ripple limitation, and levels of voltage generation across the flying capacitor nodes. This work presents the schematic basis for future hardware implementation, PCB layout, and experimental validation, and shows the potential for real-world applications of FCML converters based on wide-bandgap semiconductors in modern power conversion and applications.