Optimization of contact metallization for cryogenic High-electron-mobility transistors

The development of high-performance quantum computers requires readout systems capable of energy-efficient amplification with minimal noise at cryogenic temperatures. Low-noise amplifiers (LNAs) based on InGaAs high-electron-mobility transistors (InGaAs HEMTs) are commonly employed to read low-power signals from a quantum processor, achieving a noise temperature of 2–4K and a DC power consumption of a few milliwatts. As future quantum computers scale up the number of qubits, the number of required LNAs may increase, potentially limiting power dissipation due to constrained cooling power. Optimizing Ohmic contact to reduce access resistance is crucial for minimizing signal loss, enhancing device efficiency, and reducing power dissipation at cryogenic temperatures. This work investigates novel Ohmic contact configurations and analyzes their effects on the performance of state-of-the-art InGaAs HEMTs. The metal stack has been optimized, and metal thicknesses were systematically varied to observe their impact on contact resistance and noise indication factor. Various electrical characterization techniques have been employed, including transmission line measurements (TLM) to analyze the role of metal thickness in device performance. The measurements aimed to determine the individual parasitic resistive components and assess the DC performance of the fabricated HEMTs at both room temperature and cryogenic conditions. The results provide important insights into the correlation between the metal layer thickness and the contact resistance, contributing to the advancement of InGaAs HEMTs for quantum computing applications.