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Test optimization for DC/DC converters

Francesco Mistretta

Test optimization for DC/DC converters.

Rel. Matteo Sonza Reorda. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024

Abstract:

Semiconductor production is a highly optimized, accurate and standardized process with extremely high yields, however, it is not perfect. Defective or non-compliant devices need to be identified and isolated to avoid putting on the market non-working products. Testing of all the devices is performed by dedicated Automatic Test Equipment (ATE), which are specialized machines able to perform very fast measurements with high parallelism, being capable of measuring the parameters of many devices at the same time. These machines offer the hardware resources to perform the test, but this must be first written by a Test Engineer. Each product can be vastly different from the others, and every test program is often written from scratch to suit the specific device that needs to be tested. The process of writing and debugging the test program, together with the full verification of the semiconductor design, often takes years and is a major cost item in the development of each new design. Additional cost is given by the testing itself, with the testing time being one of the major factors. The most effective way to reduce the cost of testing corresponds to reducing the time to market and the time spent executing the test program, with the purpose of not holding back production and having less maintenance and operating expenses. This Master's Thesis, performed in the testing laboratories of STMicroelectronics Catania, aims to develop a set of libraries and rules with the final purpose of reducing the developing time of new test programs and the final testing time. This is accomplished by offering to the Test Engineers a standardized framework, which can be used to quickly and easily write the most common operations present in the majority of test programs through an already optimized and easy to use set of programming libraries. The framework is written and tested starting from an unoptimized test program originally written for the tester ETS364 and then converted for AccoTEST STS8300, a new ATE which STMicroelectronics recently started to use. The obtained results are a set of programming functions that are already in use for the development of new products, together with an optimized test program which now lasts less than 2 seconds, a reduction of more than three times with respect to the starting program. These results are extremely encouraging, and the framework proved to be very effective with the time reduction of repetitive and universal tasks which hardly vary from device to device. Future work will consist in the continuous development of more capable libraries, with the final purpose of reducing the test program development workload, while at the same time offering the maximum amount of test time reduction for an efficient final test.

Relatori: Matteo Sonza Reorda
Anno accademico: 2024/25
Tipo di pubblicazione: Elettronica
Numero di pagine: 77
Informazioni aggiuntive: Tesi secretata. Fulltext non presente
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: STMicroelectronics (Biot)
URI: http://webthesis.biblio.polito.it/id/eprint/33900
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