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Implementing homomorphic security tags in CPU pipeline

Matteo Panigati

Implementing homomorphic security tags in CPU pipeline.

Rel. Massimo Poncino. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

Abstract:

Nowadays, the main defense against fault injection attacks targeting the execution unit of a processor is made by applying redundancy, meaning a simple duplication of the data and circuitry involved in computations. But, considering the growing use of open source processors, so we can assume the possibility for the attacker to perfectly know the system chosen to be attacked, and considering that fault injection attack are under constant evolution, redundancy measure are not longer effective. One possible solution is changing domain of data representation and perform calculations on those data in a parallel way instead of making a raw copy of the data and circuitry. The change of data domain consists in applying several times a bit-wise permutation on the original data, each time with a different size and according to the values of a given key. By applying this technique we are able to increase the probability of spotting a fault injection attack during the execution of standard arithmetic and logic operations by the processor. The proposed solution was developed to work on a RISC-V processor (NaxRiscV).

Relatori: Massimo Poncino
Anno accademico: 2023/24
Tipo di pubblicazione: Elettronica
Numero di pagine: 76
Informazioni aggiuntive: Tesi secretata. Fulltext non presente
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-32 - INGEGNERIA INFORMATICA
Aziende collaboratrici: CEA - LETI
URI: http://webthesis.biblio.polito.it/id/eprint/29381
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