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Auto calibration of RF reconfigurable circuits in FD-SOI CMOS technology

Catalin Andrei Dobrin

Auto calibration of RF reconfigurable circuits in FD-SOI CMOS technology.

Rel. Vittorio Camarchia, Anna Piacibello, Jean-Marc Duchamp. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2023

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Abstract:

In an era marked by the proliferation of connected devices, the imperative to minimize ecological impact has become paramount. Novel solutions are required to make circuits reconfigurable while also prioritizing energy efficiency. This work delves into one such solution: the design of circuits capable of self reconfiguration based on contextual cues. The study centers on Multiphase Reception Radio Frequency (MR-RF) circuits, specifically investigating their integration with embedded test strategies. Central to this work is the N-path mixer, a cornerstone in modern multiphase receivers. Harnessing the N-path mixer's unique attributes, this study explores its versatility and configurable potential, positioning it not only as an independent testing entity but also a calibration tool. The study introduces an innovative approach that utilizes the N-path mixer both as a conventional mixer and an oscillator for calibration, streamlining testing processes and resource utilization in RF circuit evaluation. Through meticulous examination, this work unveils the reconfigurability of the harmonic rejection N-path mixer, demonstrating its adaptability within RF receivers. The study's findings underscore the versatility of the circuit and the criticality of maintaining signal quality while minimizing mismatches for optimal performance.

Relatori: Vittorio Camarchia, Anna Piacibello, Jean-Marc Duchamp
Anno accademico: 2023/24
Tipo di pubblicazione: Elettronica
Numero di pagine: 60
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Ente in cotutela: UNIVERSITE GRENOBLE ALPES (UGA) (FRANCIA)
Aziende collaboratrici: ST Microelectronics
URI: http://webthesis.biblio.polito.it/id/eprint/28600
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