Learning process to select relevant subset of parameters in CPU verification

Verification is a fundamental stage in the development of CPUs, ensuring their accurate and reliable functionality. It involves subjecting CPUs to a battery of tests and scenarios, simulating real-world usage to identify and rectify potential design flaws, functional discrepancies, and performance bottlenecks. In theory, the verification process should generate all possible scenarios to totally verify the CPU behaviour. In reality, the physical limitations and the limited amount of time do not allow to do that. For this reason the verification team should cleverly select some configurations to generate only representative subsets of scenario. The goal of this project is to develop an automatic process to extract a subset of relevant parameters and good configurations that impact given metrics in the verification environment.