Caused by the imperfect screening of polarization the Front end of line (FEOL) ferroelectric field effect transistor (FeFET) as non-volatile memory suffers from low data retention. The main mechanism behind is the depolarization field which counteracts the ferroelectric generated internal field and the back-switches ferroelectric dipoles degrading the memory performance. The FEOL FeFET gate stack is made of metal-ferroelectric-insulator-semiconductor (MFIS) and because of the absence of the metal electrode from semiconductor side it will provide an incomplete charge compensation and thus generating a finite depolarization field. An engineering of FeFET stack is proposed where the back end of line (BEOL) is suggested in which a floating conductive layer is sandwiched between the ferroelectric and insulator.