The purpose of this thesis is to develop an algorithm to extract compact physics-based parametric models based on equivalent circuits for on-chip inductors and transformers, starting from simulated responses. Expanding on prior work, traditional approaches based on numerical optimization are here combined with topological augmentation. As a result, an original procedure for parameter extraction is devised and tested for robustness on multiple examples (courtesy of Infineon Technologies, Munich, Germany). Furthermore, we discuss possible ways to parametrize the extracted models with respect to the device geometry with the ultimate goal of developing parametric SPICE cells that could be seamlessly integrated in an analog design workflow.