The thesis concerns the stacked amplifier topology for high frequency applications, and in particular, the goal of the following analysis is the design of a 3-stages stacked amplifier, working at 26 GHz. The possibility to overcome the problem linked to the breakdown voltage limitation on V DS and modularity makes the stacked topology particularly interesting at RF. In particular the output power and gain are directly proportional to the number of stacked stages. From a schematic point of view, a stacked amplifier is made up of a Common Source (CS) and a Pseudo-Common Gate (CG), which corresponds to a Common Gate with a capacitance connected on the its Gate terminal.