Advanced Techniques for Test of Automotive ICs

In recent years the growth of systems’ complexity leads defects and systematic failures to increase quickly. Hence, the importance of testing is increased and became a crucial parameter in the manufacturing phases. The importance of testing came from that a small defect can cause later major safety related issues during systems or devices lifetime. Testing is essential for the system's dependability. These concepts are the pillars when measuring the quality of a product. In automotive systems, high reliability and safety are crucial factors, and to satisfy these requirements the systems must go under several stress and test stages. International safety standards require high level of reliability, integrity and reliability for automotive applications. It’s very important to be assure that the system can function properly under different working environments and conditions. Although the different stages of tests are performed in different phases, the system may fail under high-stress level conditions and conditions. Stress conditions mean impose the system to excessive thermal or electrical levels. System-Level Test is the best testing technique for mimicking the operational conditions of the products. If automotive application passed the traditional testing phases, it marked as good. However, under stressful conditions (high voltage or high temperature), sometimes they cannot work because of defects and systematic failures. This thesis aims to identify faulty products and observe their errors and faults, which are marked correct under the suitable stress conditions. The Bernina microcontroller is the main actor in that thesis. The Bernina microcontroller belongs to the SPC5x family and is produced by STMicroelectronics. It is a new generation microcontroller, which is built on Power Architecture technology for automotive applications. Bernina plays an important role in automotive applications such as controlling automotive powertrain for six to eight-cylinder gasoline and diesel engines, transmission control and integrated chassis control. The goal is to stress and test data interconnections between each main core and it’s local data RAM inside Bernina and microcontroller to discover possible defects in these interconnections.