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Efficient Implementation of Spiking Neural Networks on the Loihi Neuromorphic Processor

Riccardo Massa

Efficient Implementation of Spiking Neural Networks on the Loihi Neuromorphic Processor.

Rel. Maurizio Martina, Muhammad Shafique. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020

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Abstract:

Recent developments of Deep Artificial Neural Networks (ANNs) have pushed forward the state-of-the-art in the field of image recognition. However, the high power demand required by these networks when it comes to perform inference tasks on edge devices limits the spread of ANNs in context where the energy/power consumption is crucial. On the other hand, Spiking Neural Networks (SNNs), due to their biologically inspired behavior, have shown promising results both in terms of power efficiency and real-time classification performance. Being the communication between neurons based on spikes, SNNs guarantee a lower computational load, as well as a reduction of latency. Along with the development of efficient SNN specialized accelerators (TrueNorth, SpiNNaker and Intel Loihi), another advancement in the field of neuromorphic hardware has come from a new generation of camera, the DVS event-based sensor. Such device, differently from a classical frame-based camera, works emulating the behavior of the human retina. Thus, the recorded information is not a series of time-wise separated frames, but a sequence of spikes, which are generated every time a change of light intensity is detected. The event-based behavior of these sensors pairs well with SNNs: the output of a DVS camera can be used as input of the SNN, which collects and elaborate events in real-time. A promising approach to train SNNs in a supervised learning scenario is to train an ANN with state-of-the-art backpropagation approaches, and then assign the trained parameters (weights and biases) to an equivalent SNN applying a conversion process. This approach has shown promising results, mostly because it allows to get the best from the two worlds: the converted SNN totally behaves like a normal SNN, with its benefits in terms of efficiency and latency. At the same time, the network has been trained with high performing methodologies that ensure good results in classification tasks. However, such a conversion may not always held the expected results. In fact, many aspects has to be taken into account, like the original ANN structure, the training process, as well as the parameters that control the ANN-to-SNN conversion. This is especially true when the converted SNN has to be deployed on a limited precision hardware like Intel Loihi, which restricts the degree of freedom of the conversion process. For this reason, in this thesis we present a complete ANN-to-SNN design process, systematically discussing the effects of the main parameters that take part in the conversion. We evaluate their effect, and extract some general rules that can be successfully applied when it comes to develop an SNN for Intel Loihi. Once we have a SNN that gets good accuracy results both on the MNIST and the CIFAR10 datasets, we evaluate it also on the DVS gesture dataset, which comprise 11 gestures recorded with a DVS event-based camera. The main challenge when adopting the ANN-to-SNN conversion approach to get a trained SNN is that we can not train an ANN on the event series coming from the DVS camera. For this reason, we first need to collect the events into frames and then train the ANN on such converted dataset. Different pre-processing techniques are discussed in this thesis, also reporting the accuracy results achieved by the ANN on the generated converted dataset. Finally, after the conversion, the SNN is tested on the DVS Gesture dataset, and it is ready to be deployed for real-time classification.

Relatori: Maurizio Martina, Muhammad Shafique
Anno accademico: 2019/20
Tipo di pubblicazione: Elettronica
Numero di pagine: 100
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Ente in cotutela: Technische Universität Wien, Vienna (AUSTRIA)
Aziende collaboratrici: NON SPECIFICATO
URI: http://webthesis.biblio.polito.it/id/eprint/14454
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