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Lorenzo Sinito'
Testing Framework to support C-vs-RTL Equivalence Checking.
Rel. Mariagrazia Graziano. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2019
Abstract: |
When it comes to design a system, being it hardware or software, verification is a step of extraordinary relevance, especially when the conceived product is deployed into a safety critical application or in expensive production process. However, this procedure suffers from the demanding challenge of the quick-scaling computational complexity, which becomes of significant importance when referring to big-sized models. The aim of this dissertation is to highlight the state-of-the-art verification methodologies, along with their advantages and drawbacks, and to discuss one cutting-edge technique deployed into a real-life industrial context: The alteration of an existing C/C++ model to support a C-vs-RTL verification process, and the generation of an automated testing framework suitable for verifying the correctness of the changes. |
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Relatori: | Mariagrazia Graziano |
Anno accademico: | 2019/20 |
Tipo di pubblicazione: | Elettronica |
Numero di pagine: | 47 |
Informazioni aggiuntive: | Tesi secretata. Fulltext non presente |
Soggetti: | |
Corso di laurea: | Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering) |
Classe di laurea: | Nuovo ordinamento > Laurea magistrale > LM-32 - INGEGNERIA INFORMATICA |
Ente in cotutela: | INP - Grenoble Institute of Technology - ENSIMAG (FRANCIA) |
Aziende collaboratrici: | arm |
URI: | http://webthesis.biblio.polito.it/id/eprint/12446 |
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